Compact Models for Integrated Circuit Design

This modern treatise on compact models for circuit computer-aided design (CAD) presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models. Featuring exercise problems at the end of each chapter and extensive references at the end of the book, the text supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices. It ensures even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts.

Samar K. Saha holds a Ph.D from Gauhati University, and an M.S.EM from Stanford University. He is currently adjunct professor at Santa Clara University, technical advisor at Ultrasolar Technology, distinguished lecturer and 2016-2017 president of the IEEE Electron Devices Society, and fellow of the Institution of Engineering and Technology. He previously worked for National Semiconductor, LSI Logic, Texas Instruments, Philips Semiconductors, Silicon Storage Technology, Synopsys, DSM Solutions, Silterra USA, and SuVolta, and served as a faculty member at Southern Illinois University at Carbondale, Auburn University, University of Nevada at Las Vegas, and the University of Colorado at Colorado Springs.